Cache: a place for concealment and safekeeping : Gustavo Dua...     This post shows briefly how CPU caches are organized in modern Intel processors. Cache discussions often lack concrete examples, obfuscating the simple concepts involved. Or maybe my pretty little head is slow. At any rate, here’s half the story on how a Core 2 L1 cache is accessed:     http://duartes.org/gustavo/blog/post/intel-cpu-caches     tags: cache l1 l2 What Every Programmer Should Know About Memory     As CPU cores become both faster and more numerous, the limiting factor for most programs is now, and will be for some time, memory access. Hardware designers have come up with ever more sophisticated memory handling and acceleration techniques–such as CPU caches–but these cannot work optimally without some help from the programmer. Unfortunately, neither the structure nor the cost of using the memory subsystem of a computer or the caches on CPUs is well understood by most programmers. This paper explains the structure of memory subsys- tems in use on modern commodity hardware, illustrating why CPU caches were developed, how they work, and what programs should do to achieve optimal performance by utilizing them.     http://people.redhat.com/drepper/cpumemory.pdf     tags: ram memory cpu numa l1 l2 l3 cache filetype_pdf media_document